1. Field of the Invention
The present invention relates to a power amplifier circuit, and more particularly, to a power amplifier clipping circuit that smoothes a sudden signal change when an output waveform is clipped, and generates the same output waveform for unclipped portions as the original waveform.
2. Description of the Related Art
A power amplifier, which generally uses a plurality of transistors or integrated circuit (xe2x80x9cICxe2x80x9d) devices, is an apparatus that allows an input to control a power source to produce some useful output. For example, using a power amplifier, a voice signal output from an audio apparatus may have a higher gain and better sound quality.
The power amplifier circuit has a feedback loop which feeds an output signal back to the power amplifier circuit. When an excessive input voltage is provided to the power amplifier circuit, or the power supply circuit becomes inoperable due to a short circuit, the output waveform of the power amplifier circuit is distorted. This distortion is usually referred to as clipping. For the interval when the output waveform is clipped, the feedback loop of the power amplifier circuit cannot operate.
FIG. 1 is a waveform diagram, generally indicated by the reference numeral 100, showing the input waveform 110 and the output waveform 112 of a typical power amplifier clipping circuit. Referring to FIG. 1, the dotted lines 110 outside the dynamic range show the original waveform when the output waveform was not distorted, while the solid lines 112 show the output waveform after clipping. It is shown that when an excessive input is provided, the portions that exceed the dynamic range of the power amplifier are clipped. High-frequency noise 114 is introduced at the clipping transitions. In particular, this is a serious problem in the case of a high-gain amplifier connected to a high inductance external speaker, such as when high-frequency noise 114 as shown in FIG. 1 appears while the output waveform is clipped and annoys the listener.
FIG. 2 is a circuit diagram showing a typical power amplifier clipping circuit for reducing output clipping. Referring to FIG. 2, the typical power amplifier clipping circuit 200 comprises the resistors R1 and R2 which are serially connected between a positive external power voltage +VCC and ground GND, and between ground GND and a negative external power voltage xe2x88x92VCC, respectively; a first comparator I1 which receives a predetermined first voltage VP1 that is divided by the resistors R1 and R2, and an input voltage VI, compares the two voltages and outputs the larger result; a second comparator 12, which receives a predetermined second voltage VP2 that is divided by the resistors R1 and R2 and the input voltage VI, compares the two voltages and outputs the larger result; a first diode D1 which receives the output of the first comparator I1; a second diode D2 which receives the output of the second comparator I2; a capacitor C1 which is charged by the output of the first diode D1 and the second diode D2; a transistor J1 which operates charged by the capacitor C1; resistors R0, R3, and R4; and an inductor L of an external speaker.
FIG. 3 is a waveform diagram 300 showing the output waveform 312 of the power amplifier clipping circuit of FIG. 2. The original waveform is indicated generally by the reference numeral 310 for comparison. Although clipping takes place in the regions 314, additional distortion between the original waveform 310 and the output waveform 312 can be seen between the respective plots in other regions as well. The power amplifier clipping circuit 200 is to improve the high frequency noise shown in the output waveform of FIG. 1. Although the high-frequency noise may be reduced by the power amplifier clipping circuit 200 of FIG. 2, the capacitor C1 causes the additional distortion as shown by the differences between the output waveform 312 and the input waveform 310.
The operation of the typical power amplifier clipping circuit 200 will now be explained. If the gain of the amplifier 210 is AV, and the values of resistors R1 and R2 are set so that (R1+R2)/R2=AV, the first voltage VP1 and the second voltage VP2 have the same value as the value of the input voltage VI at which the output V0 of the amplifier 210 is clipped. In this case, it is assumed that the dynamic range of the amplifier 210 is given by the interval defined by the positive external power source voltage +VCC and the negative external power source voltage xe2x88x92VCC. Although the devices inside the amplifier 210 limit this dynamic range, this deviation can be compensated by adjusting the values of the resistors R1 and R2. Thus, taking the dynamic range as above is a reasonable assumption for convenience of explanation.
When the input voltage VI is less than the first voltage VP1 and greater than the second voltage VP2, that is, in a normal operation interval, the outputs of the first comparator 11 and the second comparator 12 have negative values, and therefore, the outputs of the first comparator I1 and the second comparator I2 are blocked by the first diode D1 and the second diode D2, and the capacitor C1 is not charged. Accordingly, the electric potential of the capacitor C1 is 0V and the transistor J1 is turned off. Since current does not flow through the resistor R0 that is serially connected to the input voltage VI, a voltage drop does not occur, and the entire input voltage VI is provided to the amplifier such that a normal operation is performed.
However, when the input voltage VI is greater than the first voltage VP1, that is, when an excessive input voltage is provided to the power amplifier clipping circuit 200, the output of the second comparator 12 is still at a negative value, but the output of the first comparator I1 is at a positive value, the first diode D1 is turned on and the capacitor C1 is charged. Therefore, the transistor J1 is turned on, and the input voltage VI reaches a value which is divided by the resistor R0 and the turn-on resistance of the transistor J1, and since the value is less than the original input voltage, VI is provided to the amplifier 210. Here, the transistor J1 is a junction field effect transistor (xe2x80x9cJFETxe2x80x9d). From the aspect of the amplifier 210, the feedback loop (not shown) is continuously maintained while generation of the high frequency noise is curbed as shown in FIG. 3, and the output waveform is clipped.
It shall be understood that when the input voltage VI is less than the second voltage VP2, the result is similar to the case when the input voltage VI is greater than the first voltage VP1. Accordingly, the duplicate explanation will be omitted.
However, when the power amplifier clipping circuit 200 having the circuit structure as shown in FIG. 2 is used, the capacitor C1 should be in the circuit. In addition, if, as shown in FIG. 3, the input voltage VI, which is greater than the first voltage VP1, is provided to the power amplifier clipping circuit 200 and the capacitor C1 is charged by the resistor R4, the transistor J1 is turned on until the current is completely discharged from the capacitor Cl, and the input voltage VI is divided. Accordingly, even though a normal input voltage VI is provided again after the excessive input voltage VI is provided, the output waveform V0 of the amplifier 210 is smaller than the normal output waveform V0, as indicated by dotted waveform in FIG. 3, for a predetermined interval or until the current in the capacitor C1 is completely discharged, and the output signal becomes different from the original one. Thus, the added distortion
In addition, the device presented in the European Patent Application No. 88108772.0, which displays a circuit structure different from that of the power amplifier clipping circuit 200 of FIG. 2, but that has a clipping detector and a voltage controlled attenuator to reduce distortion of the output waveform, also requires a capacitor and therefore has the same problem of additional distortion as the power amplifier clipping circuit 200 of FIG. 2.
To solve the above problems, embodiments of the present invention provide a power amplifier clipping circuit, which, without adding a capacitor, prevents or smoothes a sudden change in the output waveform when the output waveform is clipped due to an excessive input voltage, and makes the output waveform for unclipped portions occurring immediately after providing the excessive input voltage the same as the original waveform.
Accordingly, there is provided a power amplifier clipping circuit comprising an input voltage level dividing unit which generates a first dividing voltage and a second dividing voltage that divide an interval to which the level of an input voltage belongs; a first bias transistor and a second bias transistor which are connected to a positive internal power source voltage, the first and second bias transistors forming a current mirror and providing a bias voltage to a predetermined first differential amplifying unit; a third bias transistor which is connected to the first bias transistor and provides a bias voltage to the first differential amplifying unit; a first constant current source which is connected to the third bias transistor and a negative internal power source voltage, and controls the third bias transistor; the first differential amplifying unit which receives the first dividing voltage and the input voltage, and if the level of the input voltage is between the first dividing voltage and a predetermined first clipping voltage, generates a first output signal, while if the level of the input voltage exceeds the first dividing voltage, generates a second output signal; a fourth bias transistor and a fifth bias transistor which are connected to a negative internal power source voltage, the fourth and fifth bias transistors forming a current mirror, and providing a bias voltage to a predetermined second differential amplifying unit; a sixth bias transistor which is connected to the fourth bias transistor and provides a bias voltage to the second differential amplifying unit; a second constant current source which is connected to the sixth bias transistor and a positive internal power source voltage, and controls the sixth bias transistor; the second differential amplifying unit which receives the second dividing voltage and the input voltage, and if the level of the input voltage is between a predetermined second clipping voltage and the second dividing voltage, generates a third output signal, while if the level of the input voltage exceeds the second dividing voltage, generates a fourth output signal; a first output voltage control unit which is connected between the negative internal power source voltage and an output node in which an input resistor that is serially connected to the input voltage is connected to a power amplifier, and in response to the first and second output signals, lowers the level of the input voltage and provides the input voltage to the power amplifier; and a second output voltage control unit which is connected between the positive internal power source voltage and the output node, and in response to the third and the fourth output signal, raises the level of the input voltage and provides the input voltage to the power amplifier.
It is preferable that the input voltage level dividing unit comprises a first dividing resistor, an end of which is connected to a positive external power source voltage and the other end of which is connected to a first node generating the first dividing voltage; a second dividing resistor, an end of which is connected to the first node, and the other end of which is connected to ground; a third dividing resistor, an end of which is connected to ground, and the other end of which is connected to a second node generating the second dividing voltage; and a fourth dividing resistor, an end of which is connected to the second node, and the other end of which is connected to a negative external power source voltage.
It is preferable that the second dividing resistor and the third dividing resistor have an identical resistance value, and the first dividing resistor and the fourth dividing resistor have an identical resistance value.
It is preferable that the gain of the power amplifier is given by the value obtained by dividing the sum of the resistance value of the first dividing resistor and the resistance value of the second dividing resistor by the resistance value of the second dividing resistor.
It is preferable that the first differential amplifying unit comprises a first drop differential transistor, the collector of which is connected to the collector and base of the second bias, and to the base of which the first dividing voltage is provided; a second drop differential transistor, the collector of which is connected to the collector and base of the second bias transistor and to the base of which the input voltage is provided; a third drop differential transistor, the emitter of which is connected to the emitter of the first drop differential transistor, the base of which is connected to the base of the third bias transistor, and the collector of which generates the second output signal; a fourth differential transistor, the emitter of which is connected to the emitter of the second drop differential transistor, and the base of which is connected to the base of the third bias transistor; and a first active load unit which is connected between the collectors of the third and fourth drop differential transistors and the negative internal power source voltage, and generates the first output signal.
It is preferable that the first active load unit comprises a first drop load transistor, the collector of which is connected to the collector of the third drop differential transistor, and the emitter of which is connected to the negative internal power source voltage; and a second drop load transistor, the collector of which is connected to the collector of the fourth drop differential transistor, the base and collector of which are commonly connected to the base of the first drop load transistor, and the emitter of which is connected to the negative internal power source voltage, wherein the first output signal is output from the bases of the first and second drop load transistors.
It is preferable that the power amplifier clipping circuit further comprises a plurality of resistance devices between the first and third drop differential transistors, and between the second and fourth drop differential transistors.
It is preferable that the first clipping voltage is less than the input voltage of the moment when clipping the output waveform of the power amplifier begins, by 2n times the threshold voltage of the drop differential transistors, where n denotes the number of drop differential transistors.
It is preferable that the input voltage when clipping the output waveform of the power amplifier begins has the same level as the first dividing voltage.
It is preferable that the second differential amplifying unit comprises a first rise differential transistor, the collector of which is connected to the collector and base of the fifth bias transistor, and to the base of which the second dividing voltage is provided; a second rise differential transistor, the collector of which is connected to the collector and base of the fifth bias transistor, and to the base of which the input voltage is provided; a third rise differential transistor, the emitter of which is connected to the emitter of the first rise differential transistor, the base of which is connected to the base of the sixth bias transistor, and the collector of which generates the fourth output signal; a fourth rise differential transistor, the emitter of which is connected to the emitter of the second rise differential transistor, and the base of which is connected to the base of the sixth bias transistor; and a second active load unit which is connected between the collectors of the third and fourth rise differential transistors, and the positive internal power source voltage, and generates the third output signal.
It is preferable that the second active load unit comprises a first rise load transistor, the collector of which is connected to the collector of the third rise differential transistor, and the emitter of which is connected to the positive internal power source voltage; and a second rise load transistor, the collector of which is connected to the collector of the fourth rise differential transistor, the base and collector of which are commonly connected to the base of the first rise load transistor, and the emitter of which is connected to the positive internal power source voltage, wherein the third output signal is output from the bases of the first and second rise load transistors.
It is preferable that the power amplifier clipping circuit further comprises a plurality of resistance devices between the first and third rise differential transistors, and between the second and fourth rise differential transistors.
It is preferable that the second clipping voltage is greater than the input voltage of the moment when clipping the output waveform of the power amplifier begins, by 2m times the threshold voltage of the rise differential transistors, where m denotes the number of rise differential transistors.
It is preferable that the input voltage of the moment when clipping the output waveform of the power amplifier begins has the same level as the second dividing voltage.
It is preferable that the first output voltage control unit comprises a first drop control transistor, the emitter of which is connected to the negative internal power source voltage, to the base of which the first output signal is provided, and the collector of which is connected to the output node; and a second drop control transistor, the emitter of which is connected to the negative internal power source voltage, to the base of which the second output signal is provided, and the collector of which is connected to the output node.
It is preferable that the second output voltage control unit comprises a first rise control transistor, the emitter of which is connected to the positive internal power source voltage, to the base of which the third output signal is provided, and the collector of which is connected to the output node; and a second rise control transistor, the emitter of which is connected to the positive internal power source voltage, to the base of which the fourth output signal is provided, and the collector of which is connected to the output node.
Therefore, the power amplifier clipping circuit according to the present invention prevents a sudden change in the output waveform when the output waveform is clipped due to an excessive input voltage, and makes the output waveform occurring immediately after providing the excessive input voltage the same as the original waveform.